topology: nhlt: Intel: Clear DMIC BFTH bits for version

The former Burst Fifo ThresHold bits 20-23 in output register are
specified as reserved bits starting from driver version 4.

Closes: https://github.com/alsa-project/alsa-utils/pull/254
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
Signed-off-by: Jyri Sarha <jyri.sarha@linux.intel.com>
Signed-off-by: Jaroslav Kysela <perex@perex.cz>

diff --git a/topology/nhlt/intel/dmic/dmic-process.c b/topology/nhlt/intel/dmic/dmic-process.c
index ead272509742b4a70671ee175f311c04d3dfddf8..f5e86a0eb698ee10e185d04667a8949a32d25b19 100644 (file)
--- a/topology/nhlt/intel/dmic/dmic-process.c
+++ b/topology/nhlt/intel/dmic/dmic-process.c
@@ -781,7 +781,10 @@ static int configure_registers(struct intel_dmic_params *dmic, struct dmic_calc_
                }
        }
 
-       if (dmic->dmic_prm[di].driver_version == 2 || dmic->dmic_prm[di].driver_version == 3) {
+       if (dmic->dmic_prm[di].driver_version >= 2) {
+               if (dmic->dmic_prm[di].driver_version >= 4)
+                       bfth = 0;
+
                if (di == 0) {
                        ipm_helper2(dmic, source, &ipm);
                        val = OUTCONTROL0_TIE(0) |