volatile signed int *sum, size_t dst_step,
size_t src_step, size_t sum_step)
{
+ unsigned long long old_rbx;
+
/*
- * ESI - src
- * EDI - dst
- * EBX - sum
+ * RSI - src
+ * RDI - dst
+ * RBX - sum
* ECX - old sample
* EAX - sample / temporary
* EDX - temporary
__asm__ __volatile__ (
"\n"
- "\tpush %%rbx\n"
+ "\tmovq %%rbx, %7\n"
/*
- * initialization, load ESI, EDI, EBX registers
+ * initialization, load RSI, RDI, RBX registers
*/
"\tmovq %1, %%rdi\n"
"\tmovq %2, %%rsi\n"
"\tadd %6, %%rbx\n"
"\tdecl %0\n"
"\tjnz 1b\n"
- "\tjmp 6f\n"
"6:"
"\temms\n"
- "\tpop %%rbx\n"
+ "\tmovq %7, %%rbx\n"
: /* no output regs */
- : "m" (size), "m" (dst), "m" (src), "m" (sum), "m" (dst_step), "m" (src_step), "m" (sum_step)
- : "rsi", "rdi", "edx", "ecx", "rbx", "eax"
+ : "m" (size), "m" (dst), "m" (src),
+ "m" (sum), "m" (dst_step), "m" (src_step),
+ "m" (sum_step), "m" (old_rbx)
+ : "rsi", "rdi", "edx", "ecx", "eax"
);
}
volatile signed int *sum, size_t dst_step,
size_t src_step, size_t sum_step)
{
+ unsigned long long old_rbx;
+
/*
- * ESI - src
- * EDI - dst
- * EBX - sum
+ * RSI - src
+ * RDI - dst
+ * RBX - sum
* ECX - old sample
* EAX - sample / temporary
* EDX - temporary
__asm__ __volatile__ (
"\n"
- "\tpush %%rbx\n"
+ "\tmovq %%rbx, %7\n"
/*
* initialization, load ESI, EDI, EBX registers
*/
"\tadd %6, %%rbx\n"
"\tdecl %0\n"
"\tjnz 1b\n"
- // "\tjmp 6f\n"
"6:"
- "\tpop %%rbx\n"
+ "\tmovq %7, %%rbx\n"
: /* no output regs */
- : "m" (size), "m" (dst), "m" (src), "m" (sum), "m" (dst_step), "m" (src_step), "m" (sum_step)
- : "rsi", "rdi", "edx", "ecx", "rbx", "eax"
+ : "m" (size), "m" (dst), "m" (src),
+ "m" (sum), "m" (dst_step), "m" (src_step),
+ "m" (sum_step), "m" (old_rbx)
+ : "rsi", "rdi", "edx", "ecx", "eax"
);
}